Decoupling Topology and Technology for Physical-aware Analog Tool Parameter Tuning

Analog layout generators automate physical implementation, but configuring them for different circuits and process design kits (PDKs) still requires expert knowledge and costly evaluations. Reusing historical tuning experience is difficult because parameter meanings and applicability vary across tasks, while changes in circuit structure and technology affect both layout responses and prediction reliability. We present ADAPT, which decouples circuit topology, PDK information, and parameter semantics into separate representations and fuses them to learn a global neural response prior from historical evaluations: technology information conditions the circuit graph network through feature-wise linear modulation (FiLM), and parameter choices then interact with the joint circuit–PDK context to predict layout metrics. A context-calibrated residual Gaussian process models deviations from this prior and quantifies predictive uncertainty. Target observations update the residual posterior while the neural prior remains fixed, and multi-objective Bayesian optimization selects subsequent tool parameter configurations. We construct a dataset covering 40 transistor-level circuits and three technology setups, comprising 120 circuit–PDK tasks with recorded parameter requests, execution outcomes, and available layout metrics. Experiments show that ADAPT achieves the best hypervolume (HV) any baseline attains in 40 evaluations within an average of 12.5 evaluations, a more than 3$\times$ reduction in layout tool executions. Our dataset and code are available online https://anonymous.4open.science/r/ICLR-ADAPT-1CA0/README.md.