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Under review as a conference paper at ICLR 2027

Geometric Saturation Diagnosis: Identifying the Capacity Ceiling of Parameterized Quantum Circuits via QGT Rank

Abstract

Choosing circuit depth for parameterized quantum circuits remains largely heuristic: circuits are typically deepened until optimization or hardware constraints bind, with little guidance on when additional layers cease to expand expressive capacity. We introduce *Geometric Saturation Diagnosis* (GSD), a training-free diagnostic that tracks the rank of the quantum geometric tensor (QGT) across depths to identify the saturation depth —the point at which the state manifold stops growing. The QGT rank equals the local tangent-space dimension of the parameterized state manifold; its plateau signals that the circuit has reached its geometric expressive ceiling. GSD further enables layer-wise capacity profiling via per-layer rank increments and parameter-direction importance ranking via the QGT singular value spectrum. Across hardware-efficient and Hamiltonian-inspired ans\"atze (–, TFIM and Heisenberg models), saturation depth satisfies the parameter-budget lower bound with decreasing overhead, matches the clean energy of much deeper circuits with substantially fewer parameters, and noise accumulation grows monotonically beyond saturation—identifying as a practical operating point that balances geometric capacity against noise. These results establish QGT rank growth as a principled, geometry-based diagnostic for circuit architecture selection.

open until 14 Dec 2026

est. 32% chance this paper gets accepted at ICLR 2027.

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