CircuitGate: Logic-Consistent Circuit-Level Functional Modeling for And-Inverter Graphs

And-Inverter Graphs (AIGs) are fundamental representations for logic synthesis and verification in Electronic Design Automation (EDA). As structured represen- tations of complex digital systems, AIGs require models to capture functional de- pendencies beyond local structure and remain robust to functionality-preserving transformations. In learning-based AIG representation, existing approaches are predominantly based on GNNs and rely on local gate-level message passing, lim- iting their ability to capture circuit-level functional context and making the learned representations sensitive to topology-specific patterns. Therefore, we propose Cir- cuitGate, a function-aware AIG representation learning framework that advances from gate-level semantics to circuit-level functional modeling. CircuitGate ex- plicitly encodes global primary-input (PI) support and models support-overlap- aware reconvergence between fanins, while incorporating logic-inspired Boolean constraints to encourage functionally consistent representations. We evaluate Cir- cuitGate on the large-scale ForgeEDA benchmark and further validate it on the EPFL and ITC’99 benchmarks. Across equivalent-gate identification and signal- probability prediction tasks, CircuitGate consistently outperforms existing meth- ods, achieving up to 21.7% and 14.2% reductions in MAE, respectively. Un- der direct ForgeEDA-to-OpenABC transfer without fine-tuning, CircuitGate also achieves the best equivalent-gate identification performance, demonstrating strong cross-dataset generalization. These results demonstrate the effectiveness of mod- eling circuit-level functional dependencies beyond local topology. Source code is available at https://anonymous.4open.science/r/CircuitGate/.