Circuit-Frontier Representations for Quantum Architecture Search

Hardware-aware quantum architecture search must connect logical operation dependencies with the physical resources used to execute a circuit. We introduce a circuit-frontier representation that maintains a global circuit summary and an ordered embedding for each logical wire. An autoregressive builder uses these embeddings to select operations. We study two placement strategies within the same construction framework: a learned hardware-attention pointer that reuses the embeddings, and a compiled-cost heuristic that maps the constructed circuit directly. This separation lets us test learned placement without assuming that both decisions must be neural policies. A balanced study covers six H${}_2$/LiH/H${}_2$O Hamiltonians, single- and ten-calibration training, three paired training blocks, and density-matrix simulation with native-gate and readout noise from IBM Fez calibrations. The learned-placement model has favorable aggregate policy-only point estimates against the learned controls under single-snapshot training, but several structural directions reverse under ten-snapshot training and no registered aggregate advantage survives correction. Retaining acquired circuits reveals a different comparison: the heuristic-placement learner's archive improves eight of twelve task–exposure means relative to its own frozen policy and ties the other four at reported precision, with reductions of 10.455 and 8.876 mHa on the two water tasks under ten-snapshot training. Source-matched remapping shows that archive usefulness depends on deployment placement, while a fixed policy–archive mixture does not improve the full model's normalized aggregate. The results identify circuit acquisition, placement, and candidate retention as distinct requirements for evaluating a learned circuit representation.