PRECISION ENGINEERING AN ACTIVATION FUNCTION
Abstract
Activation functions are typically designed as mathematical abstractions and evaluated independently of their underlying hardware representations. In this work, we approach the activation function as an engineering problem constrained by three requirements: (1) sublinear growth that mirrors the diminishing marginal impact of large-magnitude features while remaining unbounded above, (2) execution via standard Arithmetic Logic Unit (ALU) instructions rather than Special Function Units (SFUs), and (3) continuity and differentiability almost everywhere, sufficient for stable gradient-based optimization. To satisfy these constraints simultaneously, we introduce ReLog, an engineered activation, constructively defined by the IEEE 754 floating-point bit layout. By isolating the exponent and mantissa, ReLog replaces the linear positive domain of ReLU with a piecewise-linear behavior. This hardware-driven construction yields several testable geometric and optimization properties, which we verify empirically rather than assert. Topologically, ReLog possesses a finite number of piecewise “kinks,” bounded by for exponent field width (128 for FP32/BF16, 16 for FP16/FP8-E5M2, 8 for FP8-E4M3), with strictly linear sub-regions between them. Its gradient evaluates to exactly for exponent field and bias – a magnitude-dependent decay we show acts as an intrinsic per-node damping mechanism: across a spectral-radius sweep up to (240 trained configurations), ReLog shows zero observed divergence (Wilson 95% CI ), while standard clipping norms fail to reliably rescue an unclipped baseline at the same instability levels. Because ReLog is defined by the bit pattern, numerical precision governs its own stability: we find a clean, monotonic training-instability dose-response throughout the precision formats. We do not position ReLog as a universal replacement for all architectures, but rather test and report which domains benefit from it and which suffer.
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