acceptodds
Under review as a conference paper at ICLR 2027

CircuitTrace: Tracing Circuit Intent from Prediction to Editable Schematics

Abstract

Graph accuracy alone can overstate the advantage of a circuit-generation method. CircuitTrace traces natural-language requests through model prediction, executable validation, and saved KiCad artifacts to reveal where correctness is lost. It compares two contracts through a shared deterministic backend: SemanticIntent predicts circuit intent and delegates symbol and pin resolution to a binder; FullSpec predicts executable graphs directly. Layered checks separate graph correctness, contract validity, artifact fidelity, reference topology, and native electrical rule checking. On 59 project-disjoint passive-circuit tasks with one or two components across three training seeds, post-hoc value and net-name diagnostics give FullSpec 141 correct graphs against SemanticIntent's 131, reversing the literal-value ordering. This 10-graph lead shrinks to 3 joint reference-topology successes after realization: 133/177 versus 130/177 (75.1% versus 73.4%). FullSpec loses 4 successes at executable validation, 2 at artifact saving, and 2 at topology checking; SemanticIntent loses one artifact. Native electrical checks further distinguish topology agreement from error-free artifacts. CircuitTrace exposes implementation failures hidden by graph accuracy and provides a reproducible protocol for evaluating circuit generation through the saved design.

Then back it, or bet against it.

Related papers

Open the market on this paper to see 7 more related papers.